RTL Design Engineer

RTL Design Engineer

Job Description

Come join our ATOM team responsible for developing a unique platform to enable ATOM into new and interesting product configuration. Employing Intel’s Netspeed fabric, we are creating a totally new platforms in which to deploy the Atom processor. This job will be responsible for developing new IPs and working with SoC platform developers to incorporate the ATOM and Netspeed fabric into various SoC designs. We are looking for innovative SoC/IP RTL Design Engineers ready to design, develop, and test new IP designs as we re-imagine how to build SoCs. This role is within ATOM team in Austin, Texas.Our goal is to enable ATOM-Netspeed fabric based SoC designs for various segments.

Your responsibilities may include, but not be limited to:

• Create SoC/IP designs for ATOM-Netspeed fabric including micro-architecture development and RTL coding and integration
• Validate design and micro-architectural implementation and assumptions
• Automate tasks to complete the design in the most efficient fashion possible
• Participate in Silicon debug

In addition to the qualifications above, the ideal candidate will also have/be:

• Self-motivator with strong problem-solving skills
• Leadership skills and the willingness to mentor junior designers
• Great interpersonal skills
• Written and verbal communication skills
• Willingness to work as part of a team and collaborate in a high paced atmosphere
• Flexibility to wear different hats and perform different roles throughout the project and continuously upgrade your skill

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Requirements:

The candidate must have a Bachelor’s or Master’s degree in Electrical/Computer Engineering

3+ years of experience in:

• Design principles and techniques in one or more of the following:
• Micro-architecture definition
• RTL development
• Validation development
• Post-silicon test

Preferred Requirements:

Experience in:

• Pre or post silicon ASIC verification/validation
• Verilog and System Verilog coding and debug
• Scripting languages such as Python or Perl
• Synthesis and Timing Analysis

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

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