Engineer I-Computer Aided Design

Job content

Company Description

Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8-bit, 16-bit, and 32-bit microcontrollers, 32-bit microprocessors, field-programmable gate array (FPGA) products, a broad spectrum of high-performance linear, mixed-signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash-IP solutions that are incorporated in a broad range of products.

Job Description

The position is focused on the development of the digital design methodology and IP for integrated circuits. The primary purpose of the methodology team is to enable Microchip’s ability of producing the best quality chips in terms of power, speed, and area with cutting edge implementation methodologies and commercial software tools. These tools and methods take designs described at the abstract RTL level and transform them to the equivalent logic-gate level and transistor level implementations. The usage of these commercial software tools is complex; the purpose of the design methodology team at Microchip is to simplify and customize their usage with the creation of script infrastructure (typically in TCL or Perl) for the company. The position will also be working directly with various Foundation IP vendors (Memory, IO, Standard Cells) to integrate the IP to be used by Microchip design community.

The successful candidate will be mentored and coached by an experienced design methodology team to develop a scripting infrastructure to improve the qualification strategy of the commercial software tools that Microchip uses in digital integrated circuit design. This task will involve understanding the success criteria for various steps and tools in the design methodology, and will be followed by the creation of script automation to test each of these software tools for expected behavior over a range of different test scenarios. Throughout these tasks, the successful candidate will have the opportunity to gain experience in using the latest semiconductor development tools in the industry, in areas such as logic synthesis, logical equivalence, static timing, low-power verification, and digital circuit layout in CMOS and FinFET technologies.

Job Requirements

• Experience with UNIX (Linux) is required
• Programming skills with scripting languages such as Perl, TCL, Python, C-shell and Bourne-shell
• Good analytical and debugging skills
• Excellent verbal and written communication skills
• Strong in digital circuit analysis
• Working knowledge of statistics concepts (e.g. mean, standard deviation) for the purposes of data analysis and extracting trends
• Experience with any of the following would be an asset:
• Verilog or System Verilog
• Exposure to integrated circuit design (e.g. RTL, synthesis, static timing)
• Experience with SPICE simulation on digital circuits
• Basic design knowledge of standard cells, memory, and IO.
• Design tools such as: Genus/Design Compiler, Modus/DFT Compiler, Conformal/Formality, Tempus/PrimeTime
  

Perks And Benefits

• 40-Hour Work Week (Open to Hybrid Work Schedule - 3 Days In-Office & 2 Days WFH)
• Competitive Salary & Bonus Programs
• Restricted Stock Units (RSUs)
• Employee Stock Purchase Plan (ESPP)
• Quarterly cash bonus plan
• Evergreen Stock Plan
• RRSP/401K Savings Plan with Company Match
• Employer-Paid Medical Insurance Beginning Immediately
• Dental/Vision/Rx Drug Insurance Coverage
• Maternity/Parental Leave Top-Up
• Tuition Reimbursement Program
• Vacation Policy - 15 Days to Start & Paid Holidays
• On-Site Fitness Facility, Free Parking, And A Subsidized Cafeteria
• Casual Dress
• Comprehensive Mentorship and Education Opportunities